Physical constraints and technological challenges beyond 22-nm node now set back the further development of Moore’s Law of scaling the feature size of transistor.^[1–7] The interconnect performance becomes a key challenge to achieving the overall performance of a chip. Compared with conventional circuits, through-silicon vias (TSVs) for vertical interconnection are able to achieve shorter wiring paths, higher interconnect densities, and smaller foot prints. Therefore, the technology of three-dimensional integrated circuits (3D ICs) has the potential to significantly improve the system functionality and performance.^[1–7]

With the rapid development of silicon technologies, the operating frequency of 3D ICs has been progressively expanded into millimeter-wave (mmW) and terahertz (0.1–10 THz) regions.^[8] The heterogeneous integration and high operating speed make the signal integrity (SI) and the coupling noise induced by massive TSVs be major concerns for 3D IC systems.^[5] This is especially true for high frequency bands, in which the parasitic parameters of the TSV play more important roles in circuits. Therefore, the accurate extraction of parasitic effects of TSVs is vital for the design and assessment of 3D systems.^[2,5,6] The parasitic effects of SiO₂-based TSVs in high-frequency 3D IC systems are put forward. The passive elements (RLGC) of TSV have been proposed as functions of the physical parameters and material characteristics, while the TSV is in GS-mode.^[9–14] Up to now, few published works on TSV technology have been focused on the TSV transmission structure that is in GSG-mode.^[15–19] Coplanar waveguide (CPW) passive elements in the GSG-mode are important technologies to realize low-cost millimeter-wave ICs,^[20,21] which can also be applied to high-frequency 3D ICs. Therefore, the three-TSV system is needed to interconnect CPW on different 3D IC layers.^[15] What is more, the S-parameters of GSG-mode TSVs show better characters than those of GS-mode TSVs, especially in the millimeter frequency range.^[16] It is obvious that the S₁₁ can be reduced remarkably by using GSG-type TSVs, due to the better shielding effects of the two ground TSVs around the signal TSV. Therefore, GSG-type TSVs for microwave applications are analyzed in this paper. The S-parameters of the GSG-type TSVs are measured, but the exact parasitic effects of TSVs are not abstracted. In Ref. [17], we have investigated the parasitic effects and schematic equivalent electrical model of the GSG-mode TSV pair. However, the simplified T- or π-model of the GS- or GSG-model TSVs are needed during the design of 3D IC systems and the equivalent electrical model in Ref. [17] is difficult to reduce into a T- or π-model. Therefore, we further study it and come up with another schematic equivalent electrical model, which can be simplified into a π-model in this paper.

The schematic equivalent electrical model and simplified π-model of the GSG-mode TSV pair are established for microwave 3D ICs with operating frequency up to 10 GHz, which is based on the design physical parameters and the operating frequency in this paper. The extractions of different parasitic effects of air-gap TSVs are introduced in Section 2. Due to the low dielectric constant of air gaps, the parasitic capacitance of the air-gap TSV shows different characteristics from the conventional SiO₂-based TSV structure. In Section 3, an equivalent electrical model and lumped RLGC parameters of the GSG-type TSV pair are given, respectively. These are verified by the simulations including ADS and Ansoft’s HFSS, which show good agreement and verify our analysis.

The structure of GSG-type TSVs is shown in Fig. 1, including a signal TSV and two ground TSVs surrounded by air gaps. The equivalent circuit model using RLCG components is developed based on the geometric and material information up to 100 GHz. Since the length of TSV is short enough when compared with the wavelength of operating frequency, the lumped model is used. Parasitic effects of the inter-metal-dielectric (IMD) layer and the bottom oxide layer are also taken into account. Design parameters of TSV are listed in Table 1. The parasitic effects of TSVs, such as resistance, capacitance, and inductance, all function with materials and the geometry design. These are vital parameters assessing the performance of TSVs and 3D integration. Among these characteristics, the capacitance, determined by the dielectric constants of the insulation layer, has the most predominant influence. All propagation delay, power consumption, and crosstalk increase almost proportionally to the TSV capacitance. Low capacitance, using materials with low dielectric constants as insulation layers, is of great importance for high-performance of 3D systems.^[19–22] Air (ɛ_r = 1 at T = 273 K)^[19,20] and benzocyclobutene (BCB) polymer (ɛ_r = 2.6)^[21] are used as insulation layers instead of the conventional silicon dioxide (SiO₂) (ɛ_r = 4). The integration of low-κ (2.8) liner reduces the TSV capacitance by 27.6%.^[22] In this paper, we use the air as insulator layers of TSVs, and the oxide silicon and Cu are selected as the insulation and redistribution layers, respectively.

Table 1.

Table 1.

Table 1. Design parameters of the TSV. . Parameter Symbol Value/μm TSV radius rTSV 5 TSV height hTSV 60 TSV-to-TSV pitch pTSV 40 air-gap thickness tair 1 IMD height hIMD 2 bottom SiO2 thickness hox 2

Table 1. Design parameters of the TSV. .

Fig. 1.

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	Fig. 1. Cross-sectional view of the GSG-type TSV structure with structural parameters.

2.3. The capacitance of TSVs

A TSV assumes a metal–insulator-semiconductor (MIS) capacitance structure. The copper TSV is surrounded by a dielectric layer for dc isolation (air gaps in this paper). This isolation dielectric is surrounded by a depletion region when the TSV gate bias increases, as shown in Fig. 2. Parasitic capacitance of the TSV is investigated by the following analysis.

Fig. 2.

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	Fig. 2. Cross section view of a single TSV.

The capacitance of TSV, C_TSV is the series combination of the dielectric capacitance C_die and depletion capacitance C_dep. Analytical expression for C_TSV can be obtained by solving Poisson’s equation in a cylindrical coordinate system. The MIS capacitance of TSV is in the accumulation region when V_TSV < V_FB, where V_FB denotes the flat-band voltage. The capacitance in this case is the cylindrical dielectric capacitance given by^[6]

where ɛ_r,die and h_die are the relative permittivity and the height of the dielectric layer, respectively. As the TSV gate bias increases into the range of V_FB ≤ V_TSV ≤ V_Th, the depletion region emerges, where V_Th is the threshold voltage. At high frequency and with a fast sweeping ramp in the direction toward strong inversion, the semiconductor does not have enough time to come to equilibrium even with the large-signal variation.^[26] Thus the depletion width does not increase beyond t_max, and the minimum depletion capacitance C_dep can be obtained by the maximum radius of depletion region as

The total minimal capacitance of TSV C_TSV is the series combination of dielectric and depletion capacitance, which is given by

Figure 3 contrasts per-unit-length of dielectric capacitance, C_die, as a function of the thickness of dielectric layer. In order to better understand the advantage of air-gap structure TSV, values of C_die using SiO₂ as the dielectric layer are also shown in Fig. 3. We find that C_die of the air dielectric layer is much smaller compared with the one of SiO₂, especially when the thickness of the dielectric t_die is in the small range. It is due to that the dielectric constant of air is much smaller than that of SiO₂.

Fig. 3.

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	Fig. 3. Per-unit-length of CTSV as a function of the thickness of the dielectric layer tdie of air-gap and SiO2-based TSV.

The total capacitance of air-gap structure TSV, C_TSV as a function of the applied voltage V_TSV is shown in Fig. 4(a). In order to have a better understanding of the merits of air-gap TSV, C_TSV of SiO₂-based TSV is also shown in Fig. 4(b) for comparison. Since the dielectric layer of SiO₂ is about 0.1–0.2 μm in the state-of-the-art TSV technology, we assume t_SiO2 = t_air = 1 μm for comparison. It is shown that the capacitance of air-gap TSV is much less than that of SiO₂-based TSV, which shows a 71% reduction when V_TSV achieves V_TH. Further, the C_TSV of air-gap TSV nearly equals to the dielectric layer capacitance C_air, which shows only 5% difference. This is due to the fact that C_air is much lower than the depletion layer capacitance C_dep; C_TSV is the series combination of C_air and C_dep. Therefore, C_TSV can be approximated to C_air when the applied voltage to the air-gap TSV reaches flatband voltage V_FB. There is no need to specify the threshold voltage V_Th and depletion capacitance in a certain error range. These phenomena are studied by further quantitative analysis.

Fig. 4.

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	Fig. 4. Per-unit-length of CTSV as a function of the applied voltage VTSV for TSV: (a) air-gap TSV. (b) SiO2-based TSV.

In our research, the difference of C_TSV and C_die is defined by Δ and given by

From Fig. 2, we know that r_die = r_TSV + t_die, r_dep = r_TSV + t_die + t_max, then C_die and C_depmin are calculated as

Submitting Eqs. (15) and (16) into Eq. (14), we can obtain

from which, we can find that Δ is the function of the dielectric layer thickness t_die, the radius of TSVs r_TSV, and the thickness of depletion region t_dep. Values of Δ as a function of dielectric layer thickness at different radii of TSVs and depletion region thicknesses are shown in Fig. 5. To obtain a better understanding of the advantage of air-gap structure TSVs, Δ of SiO₂ based TSV is also shown in Fig. 5. We find that Δ rapidly drops with the increase of t_die due to that C_die goes up and C_dep goes down as the increase of t_die both for air-gap and SiO₂ structure TSVs, and Δ becomes small enough and can be ignored when t_die increases into a certain range. In addition, the influence of t_dep changes on Δ becomes significant when t_die is almost equal to t_dep and Δ also increases with the increase of t_dep. What is more, the variation of r_TSV has very finite influnece on Δ, which can be ignored.

Fig. 5.

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	Fig. 5. Values of Δ as a function of dielectric layer thickness at different radii of TSV and different thicknesses of depletion regions.

Assume that the maximum value of Δ is 5% in this paper. For the air-gap structure TSV with r_TSV = 5 μm, Δ equals to 5% when the thickness of the air gap achieves 0.75 μm and continues to reduce as t_air increases. This also means that we can simplify the C_TSV of air-gap structure TSV to C_air as long as the thickness of air gap is greater than 0.75 μm and the applied voltage V_TSV achieves V_FB. There is no need to distinguish V_Th. However, for SiO₂ structure TSV, Δ reduces to 5% when the thickness of SiO₂ is 2.65 μm due to the large permittivity of SiO₂. While t_SiO2 is about 0.1 μm at the state-of-the art TSV technology, the difference of C_TSV and C_SiO2 is 63%. This also means that it is necessary to calculate both V_Th and V_FB to determine the total capacitance for SiO₂ structure TSV.

The schematic equivalent electrical model of GSG-type TSVs can reduce to a simplified π-type transmission-line model, as shown in Fig. 6, which is simulated by advanced digital system (ADS) software. The RLGC parameters of the π-type model in this paper are given by

Fig. 6.

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	Fig. 6. Schematic equivalent electrical model and the π-type model of GSG TSV pair with air gaps as insulator layers.

The S₁₁ and S₂₁ of GSG-type TSV using air gaps as the dielectric layer are shown in Fig. 7. The solid lines are S₁₁ and S₂₁ of schematic equivalent electrical model obtained by ADS simulation. The scatter lines are S₁₁ and S₂₁ of the 3D model obtained by HFSS simulation. The solid lines accord well with the scatter ones, which verify the accuracy of our proposed schematic equivalent electrical model of GSG-type TSV. Per-unit-length of RLGC parameters of the proposed model and HFSS simulation results as a function of frequency are shown in Fig. 8. Curves of the proposed model coincide well with the HFSS simulation. The error between these is less than 5% with the operating frequency up to 100 GHz.

Fig. 7.

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	Fig. 7. S11 and S21 of GSG-type TSV.

Fig. 8.

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	Fig. 8. The per-unit-length of RLGC parameters of GSG-type TSV: (a) Ru and Cu; (b) Gu and Lu.

Compared with SiO₂, air gaps were chosen as insulator layers of TSVs due to the low permittivity in this paper. Since the electrical characteristics of GSG-type TSVs used in highspeed circuits are still obscure, the investigation of GSG-type TSVs surrounded by air gaps are performed. Precise electrical models of parasitic effects are given in this paper. The parasitic capacitance of TSV can be approximated as the dielectric capacitance of air gaps when the thickness of air gaps is greater than 0.75 μm and the applied voltage to the TSV achieves flatband voltage. There is no need to indicate the threshold voltage. The per-unit-length of RLGC parameters of the GSG-type TSV is modeled and verified by the measurements and simulation of Ansoft’s HFSS and ADS in a wideband frequency range, which shows good accuracy of the proposed model.